/* <vaerdef.h>
 *
 *	Vector Arithmetic Error Register longword mask and field definitions
 */
#ifndef _VAERDEF_H
#define _VAERDEF_H

#define VAER$V_SUMMARY	0
#define VAER$M_SUMMARY	0x0000FFFF
#define VAER$S_SUMMARY	16
#define VAER$V_F_UNDF	0
#define VAER$V_F_DIVZ	1
#define VAER$V_F_ROPR	2
#define VAER$V_F_OVFL	3
#define VAER$V_I_OVFL	5
#define VAER$M_F_UNDF	(1<<VAER$V_F_UNDF)	/* 0x01 */
#define VAER$M_F_DIVZ	(1<<VAER$V_F_DIVZ)	/* 0x02 */
#define VAER$M_F_ROPR	(1<<VAER$V_F_ROPR)	/* 0x04 */
#define VAER$M_F_OVFL	(1<<VAER$V_F_OVFL)	/* 0x08 */
#define VAER$M_I_OVFL	(1<<VAER$V_I_OVFL)	/* 0x20 */
#define VAER$V_REGISTER_MASK 16
#define VAER$M_REGISTER_MASK 0xFFFF0000
#define VAER$S_REGISTER_MASK 16
struct vaerdef {
    struct {
	union {
	    unsigned vaer$v_summary : 16;
	    struct {				/* exception summary */
		unsigned vaer$v_f_undf : 1;	/* floating underflow */
		unsigned vaer$v_f_divz : 1;	/* floating divide by zero */
		unsigned vaer$v_f_ropr : 1;	/* floating reserved operand */
		unsigned vaer$v_f_ovfl : 1;	/* floating overflow */
		unsigned	       : 1;	/* must be zero */
		unsigned vaer$v_i_ovfl : 1;	/* integer overflow */
		unsigned	       : 10;	/* must be zero */
	    } vaer$r_summary_bits;
	} vaer$r_summary_overlay;
	unsigned vaer$v_register_mask : 16;	/* desination register mask */
    } vaer$r_vaer_bits;
};

#endif	/*_VAERDEF_H*/