/* <xwdef.h>
 *
 *	XWDEF - system definitions for software DDCMP
 */
#ifndef _XWDEF_H
#define _XWDEF_H

/* device dependent status */
#define XW$V_CHA_FDX	0
#define XW$V_CHA_XPR	1
#define XW$V_CHA_DSR	2
#define XW$M_CHA_FDX	(1<<XW$V_CHA_FDX)	/* 0x01 */
#define XW$M_CHA_XPR	(1<<XW$V_CHA_XPR)	/* 0x02 */
#define XW$M_CHA_DSR	(1<<XW$V_CHA_DSR)	/* 0x04 */
/* bit definitions for fatal and informational status fields */
#define XW$V_FAT_STAT	0
#define XW$M_FAT_STAT	0x03FF
#define XW$S_FAT_STAT	10
#define XW$V_INFO_STAT	10
#define XW$M_INFO_STAT	0xFC00
#define XW$S_INFO_STAT	6
/* read/write function modifier definition */
#define XW$V_EOT	0
#define XW$V_DATACK	1
#define XW$V_NODSR	2
#define XW$V_DISCON	3
#define XW$V_TRABINTMO	4
#define XW$V_PIPE_MARK	5
#define XW$V_BADCHAIN	6
#define XW$V_ILLMOD	7
#define XW$V_RVI	10
#define XW$V_CONACK	11
#define XW$V_XPR	12
#define XW$V_ETXEND	13
#define XW$V_PUNCH	16
#define XW$V_HOR_FOR	17
#define XW$M_EOT	(1<<XW$V_EOT)		/* 0x01 */
#define XW$M_DATACK	(1<<XW$V_DATACK)	/* 0x02 */
#define XW$M_NODSR	(1<<XW$V_NODSR)		/* 0x04 */
#define XW$M_DISCON	(1<<XW$V_DISCON)	/* 0x08 */
#define XW$M_TRABINTMO	(1<<XW$V_TRABINTMO)	/* 0x10 */
#define XW$M_PIPE_MARK	(1<<XW$V_PIPE_MARK)	/* 0x20 */
#define XW$M_BADCHAIN	(1<<XW$V_BADCHAIN)	/* 0x40 */
#define XW$M_ILLMOD	(1<<XW$V_ILLMOD)	/* 0x80 */
#define XW$M_RVI	(1<<XW$V_RVI)		/* 0x0400 */
#define XW$M_CONACK	(1<<XW$V_CONACK)	/* 0x0800 */
#define XW$M_XPR	(1<<XW$V_XPR)		/* 0x1000 */
#define XW$M_ETXEND	(1<<XW$V_ETXEND)	/* 0x2000 */
#define XW$M_PUNCH	(1<<XW$V_PUNCH)		/* 0x010000 */
#define XW$M_HOR_FOR	(1<<XW$V_HOR_FOR)	/* 0x020000 */
#define XW$V_IOMOD	13
#define XW$M_IOMOD	0x00E000
#define XW$S_IOMOD	2
union xwdef {
    struct {
	unsigned xw$v_cha_fdx : 1;	/* full duplex line */
	unsigned xw$v_cha_xpr : 1;	/* transparency */
	unsigned xw$v_cha_dsr : 1;	/* Data Set Ready set */
	unsigned	      : 5;
    } xw$r_xwdef_bits0;
    struct {
	unsigned xw$v_fat_stat	: 10;	/* beginning of fatal stat flags */
	unsigned xw$v_info_stat : 6;	/* start of informational status */
    } xw$r_xwdef_bits1;
    struct {
	unsigned xw$v_eot      : 1;	/* EOT received */
	unsigned xw$v_datack   : 1;	/* retry threshold exceeded */
	unsigned xw$v_nodsr    : 1;	/* line not connected */
	unsigned xw$v_discon   : 1;	/* disconnect (DLE, EOT) rcvd */
	unsigned xw$v_trabintmo: 1;	/* binary transmit timeout */
	unsigned xw$v_pipe_mark: 1;	/* aborted because of pipe mark */
	unsigned xw$v_badchain : 1;	/* bad record list */
	unsigned xw$v_illmod   : 1;	/* illegal QIO modifier */
	unsigned	       : 2;
	unsigned xw$v_rvi      : 1;	/* buffer ACKed with RVI */
	unsigned xw$v_conack   : 1;	/* buffer ACKed with conver resp */
	unsigned xw$v_xpr      : 1;	/* buffer rcvd with transparency */
	unsigned xw$v_etxend   : 1;	/* rcvd block ended with ETX */
	unsigned	       : 2;
	unsigned xw$v_punch    : 1;	/* punch select found */
	unsigned xw$v_hor_for  : 1;	/* horizontal forms record rcvd */
	unsigned	       : 6;
    } xw$r_xwdef_bits2;
    struct {
	unsigned	       : 13;
	unsigned xw$v_iomod    : 3;	/* I/O modifier field start */
    } xw$r_xwdef_bits3;
};

#endif	/*_XWDEF_H*/